Live
AI-Era Design Verification Foundation
Stage 1 slide decks: course overview plus lectures 1–4. Recorded video comes later.
Open slidesVerification Excellence
Where functional verification is practiced and taught.
Verification Excellence is the home for functional verification in the VLSI industry. Practice is the DV-Gym. Study is the courses and the books, with writing published alongside them. It is for engineers learning the craft and for engineers already doing the work.
DV-Gym
Practice tools for the verification engineer.
Live
Mock interviewer
Seven-phase Comprehensive DV practice. Deterministic scoring is open. Assisted and Adaptive modes are coming soon.
Open interviewerLive
Debug and code review
Playground chat, editor, Verilator, and waveforms. Guests get two compiles; sign in for more.
Open playgroundOnline courses
Self-paced courses on Udemy. Take them in this order.
View all coursesBooks
Books for interview preparation and day-to-day verification work.
Cracking Digital VLSI Verification Interview
A golden reference for preparing for a digital VLSI verification interview.
500+ questions across nine chapters, plus a section of behavioral interview questions.
Topics covered
- Digital Logic Design (Number Systems, Gates, Combinational, Sequential Circuits, State Machines, and other Design problems)
- Computer Architecture (Processor Architecture, Caches, Memory Systems)
- Programming (Basics, OOP, UNIX/Linux, C/C++, Perl)
- Hardware Description Languages (Verilog, SystemVerilog)
- Fundamentals of Verification (Verification Basics, Strategies, and Thinking problems)
- Verification Methodologies (UVM, Formal, Power, Clocking, Coverage, Assertions)
- Version Control Systems (CVS, GIT, SVN)
- Logical Reasoning/Puzzles (Related to Digital Logic, General Reasoning, Lateral Thinking)
- Non Technical and Behavioral Questions (Most commonly asked)
Blogs
Notes on verification, from the archive and as they are written.
22 Feb 2019
Implementing randc behavior using regular constraints in SystemVerilog18 Feb 2019
What is a Verification Test plan?16 Feb 2019
How similar is an ASIC verification job compared to a Software coding profile?18 Aug 2018
Verification Engineer Career- Opportunities and Path15 Aug 2018
VLSI Design – Front End and Back End29 Jul 2018
Opportunities For Electronics Engineering Graduates20 Jul 2018
Verification, Validation, Testing of ASIC and SOC designs – What are the differences?30 Jun 2018
Cracking Digital VLSI Verification Interviews: Interview Success – A unique book16 May 2018
What makes a great Verification engineer?
Contact
contact@verificationexcellence.in
Bangalore